Board of Directors

Dr. Ramin Hojati. Dr. Ramin Hojati is the President and founder of Averant. He obtained his B.S. from Massachusetts Institute of Technology in 1988 in math and computer science. From 1988 to 1990, he worked on layout and logic synthesis tools at Cadence Design Systems. He obtained his M.S. and Ph.D. in computer science in 1992 and 1996, respectively, from the University of California, Berkeley. Dr. Hojati has been the main architect of several large scale software developments, has written over 20 research papers in verification and delivered many talks in CAD, has served in the program committees of trade conferences, and is a leading figure in computer-aided verification. At U.C. Berkeley, he was the main driving force behind Berkeley's first generation verification system, HSIS. Before that, he was the author of the first BDD-based engine for Lucent Technologies FormalCheck. Dr. Hojati has significant background in design verification, and has been a design verification consultant to Cisco, Compaq, IBM, SGI, and SUN Microsystems.

Manuel Correia. Manuel Correia is Executive Vice President and Chief Operating Officer at CoWare. Previously he worked for Cadence as Vice President of Technical Services (1995-97), Vice President of Application Engineering (1994-95), and Vice President of Customer Service (1990-93). From 1988-90, he was Vice President of Marketing and Customer Service at Gateway Design Automation. Prior to these positions, he worked at IBM for nearly thirty-two years. He is currently on the Board of Directors at Infinium Software, Inc. based in Hyannis, MA, and C.A.T.S., a financial risk management software company based in Palo Alto, CA. Manuel Correia received a B.S. degree in Electrical Engineering from Northeastern University in 1957, and a M.S. degree in Business from S.U.N.Y. Binghamton in 1970.

Dr. Phil Mak. Dr. Mak is a General Partner of VenGlobal Capital Fund. He was a founder & CEO of Symphony Laboratories, a fabless IC product company specializing in PC chipset and peripheral chips located in Silicon Valley. He was also a co-founder of Knights Technology, a Silicon Valley software company with leading technology in IC verification and yield analysis. Previously, Dr. Mak was head of the Corporate CAD group of Sun Microsystems where he was instrumental in building from scratch Sun's world-class design automation environment. He was also a Z80000 CPU designer at Zilog. Dr. Mak received his doctorate degree in Computer Science from the University of Illinois at Urbana-Champaign. Dr. Mak served as Board Director of Network Information Technology, and is currently on the Board of Circuit Semantics, Get2Chip.com, WebScope, Sapphire Design Automation, and Impala Linear.

Technical Advisory Board

Professor Robert K. Brayton. Robert Brayton received the BSEE degree from Iowa State University in 1956 and the P h.D. degree in mathematics from MIT in 1961. From 1961 to 1987 he was a member of the Mathematical Sciences Department of the IBM T. J. Watson Research Center. In 1987 he joined the EECS Department at Berkeley, where he is a Professor and Director of the SRC Center of Excellence for Design Sciences. He has authored over 200 technical papers, and six books. Dr. Brayton is a member of the National Academy of Engineering, and a Fellow of the IEEE and the AAAS. He received the 1991 IEEE CAS technical achievement award, the 1971 Guilleman-Cauer award, and the 1987 Darlington award. He was the editor of the Journal on Formal Methods in Systems Design from 1992-1996. Past contributions have been in analysis of nonlinear networks, and electrical simulation and optimization of circuits. Current research involves combinational and sequential logic synthesis for area/performance/testability, asynchronous synthesis, and formal design verification.

Professor Masahiro Fujita. Masahiro Fujita received his Ph.D. degree in Engineering from the University of Tokyo in 1985 and shortly after joined Fujitsu Laboratories Ltd. From 1993 to 2000, he had been assigned to Fujitsu's US research office and directed the CAD research group. In March 2000, he joined the department of Electronic Engineering in the University of Tokyo as a professor. He has written over 100 technical papers on all aspects of logic design CAD. He has received several awards from Japanese major scientific societies on his works in formal verification and logic synthesis. His doctor degree thesis was written in early 80's and on model checking. Since then he has been involved in many research projects on various aspects of formal verification.