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News & Events

Averant Announces Solidify 8.0: Complete Rewrite of Graphical User Interface

Averant Announces Comprehensive Self Paced Training

Averant Announces Solidify 7.2, Introducing a Helper Engine for the Hard Case Solver

Averant Announces Solidify 7.1, Featuring New Hard Case Engine

Averant Ships Solidify 7.0 With Engine Improvements and Equivalency Checking Included Free of Charge

Averant Announces Solidify 7.0 Showcasing a New Verification Engine

Silicon Library Adopts Averant's Solidify Automated Checks Using CDC Inc. EDA Cloud Services

Averant's Solidify 6.5 Significantly Improves Combinational and Sequential Equivalency Checking and Clock

Averant Announces Extensive Video Tutorials

Averant's Solidify 6.3 Improves Property Lint, Hierarchical Verification and Coverage

Averant Integrates Timing Constraints Checking and Improves Functionality with Release of Solidify 6.0

Averant Adds RTL and Gate Level Combinational Equivalency Checker

Averant Announces Toshiba Expanding Deployment of Solidify

Averant Announces Release of Solidify 5.2.0

Averant Announces Release of Solidify 5.1.0

Averant Announces New Engine, Next Generation Testbench-less Bug Hunting, Support for System Verilog

Previous News

Averant Announces Release of Solidify (tm) 5.0

Averant Announces SolidTC, Timing Constraint Verifier

Averant Announces Solidify 3.0 Release

ARM's Paper on X Analysis Using Solidify, Best paper, SNUG 03

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